Reflection Reduction on DDR3 High-Speed Bus by Improved PSO
نویسندگان
چکیده
منابع مشابه
Reflection Reduction on DDR3 High-Speed Bus by Improved PSO
The signal integrity of the circuit, as one of the important design issues in high-speed digital system, is usually seriously affected by the signal reflection due to impedance mismatch in the DDR3 bus. In this paper, a novel optimization method is proposed to optimize impedance mismatch and reduce the signal reflection. Specifically, by applying the via parasitic, an equivalent model of DDR3 h...
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ژورنال
عنوان ژورنال: The Scientific World Journal
سال: 2014
ISSN: 2356-6140,1537-744X
DOI: 10.1155/2014/257972